ALLVIA opens its facility for TSV development projects with customers
Sunnyvale, ( 10 June, 2004) – ALLVIA today opened its facility for joint TSV development projects with customers. The facility represents an
investment of more than $6 million and will serve as the primary location for support for customers throughout the world. The lab is a 3000 sq. ft., class
100 facility. Capabilities include development for silicon via etching, via copper plating, CMP, 3D stacking, system in a package (SiP) development for
RF, MEMS and semiconductor applications.
About ALLVIA, Inc. The Company provides Thru-Silicon Via R&D services to semiconductor, RF and MEMS industries in order to meet increasing
demands for advanced vertical interconnects and System-in-Package (SiP) solutions. Through vias allow for the shortest electrical path between two sides
of wafers or dice, used for 3D die-to-die or die-to-wafer or wafer-to-wafer stacking as well as for RF and MEMS wafer level packaging (WLP). A full line
of in-house processing equipment offers quick turnaround of custom through wafer via manufacturing and testing. Low volume production runs can also
be accommodated.