Sunnyvale, California, 10 June, 2004

ALLVIA has opened a facility for joint TSV development projects with customers in the heart of Silicon Valley. The facility represents an investment of more than $6 million and will serve as the primary location for support for customers throughout the world. The lab is a 6000 sq. ft., class 100 facility. Capabilities include development for silicon via etching, via copper plating, CMP, 3D stacking, system in a package (SiP) development for RF, MEMS and semiconductor applications.

ALLVIA, Inc. provides Through-Silicon Via R&D services to semiconductor, RF and MEMS industries in order to meet increasing demands for advanced vertical interconnects and System-in-Package (SiP) solutions. Through vias allow for the shortest electrical path between two sides of wafers or dice, used for 3D die-to-die or die-to-wafer or wafer-to-wafer stacking as well as for RF and MEMS wafer level packaging (WLP). A full line of in-house processing equipment offers quick turnaround of custom through wafer via manufacturing and testing. Low volume production runs can also be accommodated.

About ALLVIA

Located in Silicon Valley, ALLVIA (http://www.allvia.com/) is the first through-silicon via (TSV) foundry. ALLVIA introduced the term, through-silicon via, in a 1997 business plan and a January 2000 technical article. With the full spectrum of facilities, IP and equipment, ALLVIA offers services for prototyping and full volume production of both front side and back side TSVs to the MEMS and semiconductor industries as well as silicon etching, copper plating, photolithography, and CMP.